The present invention relates to a method for etching and cleaning a semiconductor substrate.
In the manufacture of integrated circuits, active devices are formed on a semiconductor substrate by alternately depositing and etching layers of dielectric, semiconducting, and conducting materials, such as silicon dioxide, polysilicon, and metal compounds and alloys. These layers are etched to form a pattern of etched features, by providing a resist layer of photoresist and/or oxide hard mask on the substrate, and using lithography to expose and pattern the resist layer. The portions of the layers adjacent to the patterned resist features are etched to form a predefined pattern of gates, vias, contact holes, trenches, and/or metal interconnect lines. Etching is typically performed using a capacitively or inductively coupled plasma of halogen-containing gases, as for example described in Silicon Processing for the VLSI Era, Vol. 1, Chapter 16, by Wolf and Tauber, Lattice Press, 1986, which is incorporated herein by reference.
After the etching process, etchant residue and remnant resist material that remain on the substrate are removed prior to processing of the next layer on the substrate. The etchant residues formed during the etching processes are typically complex compositions that condense from the vaporized plasma environment onto the freshly etched features and other surfaces of the substrate. The composition of the etchant residue depends upon the composition of the etching gas, the vaporized species of the layer that is being etched, and the composition of the organic resist or hard mask layer that is sputtered or etched away by energetic plasma ions. Typically, the etchant residue comprises a polymeric composition containing carbon, hydrogen, oxygen, and nitrogen species. When dielectric layers were etched to form vias, the etchant residue also includes vaporized metal species, such as aluminum, titanium, copper, or mixtures thereof. Vias are plugs of conducting material that electrically connect to a metal interconnect line underlying the dielectric layer. Vias are formed by etching a hole or void into the dielectric layer, and subsequently filling the hole with a conducting material. To provide better electrical contact, the etching generally comprises an overetch step that removes a surface thickness of from 50 to 300 .ANG. of the underlying metal layer.
One method of cleaning or removing the residue material is a dry cleaning method in which a plasma of a gas, such as oxygen is used to burn off the residue material remaining on the substrate. However, etchant residue is difficult to remove by dry cleaning methods because the chemical composition the etchant residue varies widely across the substrate surface, and a plasma that is sufficiently aggressive to remove all of the etchant residue across the entire substrate surface will often damage the underlying substrate. This is especially true when the etchant residue contains metal species, such as the etchant residue obtained after a via etching process in which a thin surface layer of the exposed metal is etched away and the etched metal species condense as the etchant residue. For these reasons, the etchant residue is typically removed by a wet cleaning process in which the substrate is scrubbed in a heated solvent (for example EKC 265, commercially available from Shipley, Co., Newton, Massachusetts) to dissolve accumulated etchant residue. However, the wet cleaning process often requires a solvent that is costly and hazardous to the environment. Moreover, transferring the substrate from the etching process chamber to a wet cleaning station lowers yields from the substrate due to contamination in the transferring operation. Furthermore, exposure of the freshly etched metal features to the atmosphere during transport of the substrate between the different processing stations can oxidize contact/junction points, providing high electrical contact resistances, which are undesirable.
Yet another problem with conventional processes for cleaning and removing etchant residue and stripping or ashing remnant resist on the substrate, arises from the high process temperatures that are used during the stripping process. Conventional resist stripping processes heat the substrate to temperatures of 200 to 400.degree. C. in an oxygen plasma to ash and burn off the remnant resist. The high substrate temperatures can damage the active devices formed on the substrate, for example, by causing diffusion of dopant material to and from the active semiconductor regions. Also, high temperatures can thermally degrade low dielectric constant (low K) dielectric materials which are typically organic polymer materials.
Accordingly, there is a need for a process for removing etchant residue and stripping remnant resist across the entire surface of a substrate, without damaging or etching the surrounding or underlying layers. It is also desirable for the process to minimize exposure of the substrate to oxidizing environments when performing multiple etching and cleaning process steps. It is further desirable to have an etching and cleaning process that does not result in high electrical contact resistance at junction points on the substrate surface and that operates at low temperatures to prevent diffusion between, or thermal degradation of, the substrate layers.